Transistor Aging Exploration of 16nm FinFET

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Team Members: Yonathan Schuftan, Ran Shenkar

Supervisors / Mentors: Prof. Freddy Gabbay

 

As modern transistors continue to shrink in size, aging effects pose a growing threat to the reliability and long-term stability of digital systems. Over time, degradation leads to slower switching, shifts in device characteristics, and timing issues that may result in system failure. This project explores how these effects impact circuit performance through detailed simulations of common building blocks found in modern processors.

The analysis focuses on designs implemented in the 16nm FinFET process, with attention to how different structures respond to long-term operation and varying physical conditions. We also examine the effectiveness of anti-aging circuits and identify design features most susceptible to long-term wear. These insights are essential for addressing reliability challenges in advanced semiconductor systems.

By identifying how and where aging occurs, this project supports the development of more robust and reliable chip designs for future technologies.